Implements a clock abstraction that:
- Allows setting branch clocks
- Configuring plls in the same manner as before
- Configuring integer dividers
- Using integer dividers with pll1 to generate a hierarchically generated clock
Together with this, a complete example with a hierarchical pll+integer divider setup is provided (examples/cgu.rs) and a new transitional feature "legacy_clocks" is introduced that allows projects that depend on the old abstraction to compile.