can.rs

#![feature(panic_info_message)]
#![no_main]
#![no_std]
extern crate panic_halt;

use lpc43xx_hal::{
    can::{CanBus, MsgIface, MsgObj},
    io::pin::{split_ports, PinSplit},
    pac,
    serial::Serial,
    timer::{Timer, EMC0_A, InterruptType, MR0I_A, MR0R_A, MR0S_A, NoMatchPin, NoCapturePin},
};
use pac::{
    c_can1::cntl::{DAR_A, EIE_A, IE_A, SIE_A},
    usart0::lcr::{BC_A, DLAB_A, PE_A, PS_A, SBS_A, WLS_A},
    SCU,
};

use heapless::consts::U32;

static TIMER_PERIOD: u32 = 8192;

// Panic handler for USART3
// use lpc43xx_hal::{debug::PanicInfo, uart_panic_handler};
// uart_panic_handler!(pac::USART3);

use core::fmt::Write;
use rtfm::app;

type Timer0 = Timer<pac::TIMER0, NoMatchPin, NoMatchPin, NoMatchPin, NoMatchPin, NoCapturePin, NoCapturePin, NoCapturePin, NoCapturePin>;

#[app(device = lpc43xx_pac)]
const APP: () = {
    static mut TIMER: Timer0 = ();
    static mut UART: Serial<pac::USART3> = ();
    static mut CAN_0: CanBus<pac::C_CAN0, U32> = ();
    static mut CAN_1: CanBus<pac::C_CAN1, U32> = ();
    static mut TX_OBJ: MsgObj = ();
    static mut TX_STATE: u8 = ();

    #[init]
    fn init() -> init::LateResources {
        let tx_state: u8 = 0;

        // Pins
        let port_9 = split_ports(device.SCU, device.GPIO_PORT)
            .port_9
            .split_pins();
        let uart_tx = port_9.p9_3;
        let uart_rx = port_9.p9_4;

        // ========= TIMER INITIALIZATION ==========
        let mut timer = Timer0::new_no_pins(device.TIMER0);
        timer.start_timer(false);
        timer.set_match(0, TIMER_PERIOD);
        timer.set_prescaler(1024, Some(0));
        unsafe {
            timer.mr0(MR0I_A::INTERRUPT, MR0R_A::RESET, MR0S_A::NO_STOP, EMC0_A::NOP);
        }
        timer.start_timer(true);

        // ========= SERIAL OUTPUT INITIALIZATION ==========
        let mut serial =
            Serial::<pac::USART3>::new(device.USART3, uart_tx, uart_rx, 0x41, 0x0, 0x0);
        serial.lcr(
            WLS_A::_8_BIT_CHARACTER_LENGTH,
            SBS_A::_1_STOP_BIT,
            PE_A::DISABLE_PARITY_GENERERATION,
            PS_A::ODD_PARITY,
            BC_A::DISABLED,